LCOV - code coverage report
Current view:
top level
-
src/assembly
- instruction.rs
(
source
/ functions)
Coverage
Total
Hit
Test:
lief.lcov
Lines:
0.0 %
165
0
Test Date:
2025-01-11:00:00:00
Functions:
0.0 %
60
0
Function Name
Hit count
Lines
<_ as lief::assembly::instruction::Instruction>::address
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::address
0
::address
0
<_ as lief::assembly::instruction::Instruction>::branch_target
0
0.0 % (0 / 4)
<_ as lief::assembly::instruction::Instruction>::branch_target
0
::branch_target
0
<_ as lief::assembly::instruction::Instruction>::branch_target::{closure#0}
0
0.0 % (0 / 2)
<_ as lief::assembly::instruction::Instruction>::branch_target::{closure#0}
0
::branch_target::{closure#0}
0
<_ as lief::assembly::instruction::Instruction>::is_add
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_add
0
::is_add
0
<_ as lief::assembly::instruction::Instruction>::is_barrier
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_barrier
0
::is_barrier
0
<_ as lief::assembly::instruction::Instruction>::is_bitcast
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_bitcast
0
::is_bitcast
0
<_ as lief::assembly::instruction::Instruction>::is_branch
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_branch
0
::is_branch
0
<_ as lief::assembly::instruction::Instruction>::is_call
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_call
0
::is_call
0
<_ as lief::assembly::instruction::Instruction>::is_compare
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_compare
0
::is_compare
0
<_ as lief::assembly::instruction::Instruction>::is_conditional_branch
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_conditional_branch
0
::is_conditional_branch
0
<_ as lief::assembly::instruction::Instruction>::is_indirect_branch
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_indirect_branch
0
::is_indirect_branch
0
<_ as lief::assembly::instruction::Instruction>::is_memory_access
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_memory_access
0
::is_memory_access
0
<_ as lief::assembly::instruction::Instruction>::is_move_immediate
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_move_immediate
0
::is_move_immediate
0
<_ as lief::assembly::instruction::Instruction>::is_move_reg
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_move_reg
0
::is_move_reg
0
<_ as lief::assembly::instruction::Instruction>::is_return
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_return
0
::is_return
0
<_ as lief::assembly::instruction::Instruction>::is_syscall
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_syscall
0
::is_syscall
0
<_ as lief::assembly::instruction::Instruction>::is_terminator
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_terminator
0
::is_terminator
0
<_ as lief::assembly::instruction::Instruction>::is_trap
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::is_trap
0
::is_trap
0
<_ as lief::assembly::instruction::Instruction>::is_unconditional_branch
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::memory_access
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::memory_access
0
::memory_access
0
<_ as lief::assembly::instruction::Instruction>::mnemonic
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::mnemonic
0
::mnemonic
0
<_ as lief::assembly::instruction::Instruction>::raw
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::raw
0
::raw
0
<_ as lief::assembly::instruction::Instruction>::size
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::size
0
::size
0
<_ as lief::assembly::instruction::Instruction>::to_string
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::to_string
0
::to_string
0
<_ as lief::assembly::instruction::Instruction>::to_string_no_address
0
0.0 % (0 / 3)
<_ as lief::assembly::instruction::Instruction>::to_string_no_address
0
::to_string_no_address
0
<lief::assembly::instruction::Generic as lief::assembly::instruction::Instruction>::as_generic
0
0.0 % (0 / 3)
<lief::assembly::instruction::Generic as lief::common::FromFFI<lief_ffi::autocxx_ffi::bindgen::root::asm_Instruction>>::from_ffi
0
0.0 % (0 / 5)
<lief::assembly::instruction::Instructions as lief::assembly::instruction::Instruction>::as_generic
0
0.0 % (0 / 19)
<lief::assembly::instruction::Instructions as lief::common::FromFFI<lief_ffi::autocxx_ffi::bindgen::root::asm_Instruction>>::from_ffi
0
0.0 % (0 / 55)
<lief::assembly::instruction::MemoryAccess as core::cmp::Ord>::cmp
0
0.0 % (0 / 7)
::clone
0
::cmp
0
::eq
0
::partial_cmp
0
::fmt
0
::hash::<_>
0
<lief::assembly::instruction::_::InternalBitFlags as core::str::traits::FromStr>::from_str::{closure#0}
0
0.0 % (0 / 1)
Generated by:
LCOV version 2.1-1